Search results for computer+hardware

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CSALT: Context switch aware large translation look-aside buffer (TLB)
BackgroundContext Switch Aware Large TLB (CSALT) addresses the problem of increased TLB miss rates and their adverse impact on data caches. The invention proposes to partition the on-chip caches to house translation entries (TLB entries/page table entries) alongside data. The partitioning is achieved by means of a low overhead cache partitioning algorithm...
Very large DRAM-based TLB
Background Cloud services use virtualization platforms to provide their services. These platforms use hypervisors to enable easier scalability of applications and higher system utilization by abstracting the underlying host resources. Unfortunately, these systems have an increased level of memory virtualization pressure, as hypervisors and guests keep...