Thin plasmonic mid-IR detectors for enhanced functionality

Technology background

The mid-infrared (MIR) wavelength range is vital for a range of sensing, security and defense, and fundamental science applications. While some of these applications, such as infrared imaging, can function with a single value readout, the majority of them, such as chemical spectroscopy, thermography, or ranging, require spectral information. Unfortunately, generating spectral information often necessitates bulky additional optics, such as filters or spectrometers. There is thus a significant need for a high-performance infrared detector, which can provide bias-dependent spectral information in a monolithic form factor.

The field of plasmonics leverages the use of metallic materials to manipulate light into sub-diffraction limited volumes and therefore dramatically enhance light-matter interaction. In the MIR, plasmonic layers have been used to significantly enhance light emission and detection. Thin plasmonic materials can host two surface plasmon-polariton (SPP) modes: the lower energy short-range SPP (SRSPP) and the higher energy long-range SPP (LRSPP). These modes are spectrally separate and therefore are promising candidates for bias-selectable dual-color, dual-band, and angle sensitive detection; all of this functionality can be realized in a backside illumination configuration. Additionally, these SPP modes are tightly bound to the plasmonic layer, enabling relatively thin absorbers and consequently lower dark current.

We have initial experimental results demonstrating one particular functionality, dual-color bias selectable operation. Our proposed structure consists, from the substrate up, of a lossless dielectric or infrared detector material, a thin highly doped n++ In containing III-V alloy layer (in the range of 25-1000 nm thick) followed by a lossless dielectric or a thin T2SL detector structure (consisting of absorber, barrier, and contact layer), and finally followed by a patterned metal dielectric structure above the epitaxially grown dielectric or detector/n++/​dielectric or detector. The thickness of the individual layers and the period of the patterned top structure allows us to control the wavelength and magnitude of the plasmonic response and therefore the detector response. This control allows us to tailor our system for a specific function. The top patterned metal/dielectric provides momentum to couple into the plasmonic modes. Additionally, controlling the cut-off wavelength of the absorbers around our thin metal enables us to further engineer the absorption spectrum of our detector structure.

Description and benefits

Our proposed structure consists of a thin, highly doped semiconductor with dielectric materials on either side. The highly doped semiconductor serves as a host for two plasmonic modes, the short-range and long-range surface plasmon-polariton. Further technical discussion may be found in the peer-reviewed publication here.

  •  Additional functionality (dual-band, dual-color, angle sensitive, wavelength sensitive, or wavelength selective, etc.)
  • Clear path to focal plane array implementation
  • Significant increase in absorption for thin layers
  • Lowered cost of epitaxial growth
  • Relaxation of strain limitations on absorber design
  • No active layer removal from substrate
  • Compatible with all detector fabrication processes
  • Flexibility to adjust to different detector thicknesses
  • Flexibility to adjust to different metal thicknesses
  • Can design for strong polarization sensitivity (~10:1), but can also design to be polarization insensitive.

Fig 1. (a) Band structure of the sample layer stack.  (b) Sample layer stack with symmetric LRSPP (red) and anti-symmetric SRSPP (blue) filed plots overlaid. (c) Real (solid) and imaginary (dashed) dispersion for symmetric LRSPP (red), anti-symmetric SRSPP (blue) and single interface SPP (green). Light line is shown in black for propagation in material with permittivity of  εb = 12.56. (d) Experimental (solid) and RCWA-simulated (dashed) reflection from the as-grown wafer.